1. Field of the Invention
The present invention relates to a timing generating apparatus for generating a timing signal whose value changes at desired timing and a test apparatus for testing an electronic device. More particularly, the present invention relates to a timing generating apparatus for generating a timing signal whose jitter is small.
2. Related Art
Recently, a test apparatus for testing an electronic device such as a semiconductor device includes a timing generating apparatus for generating a desired timing signal. For example, it supplies a test signal to the electronic device at the timing based on the timing signal generated by the timing generator. The timing generating apparatus receives a reference clock and delays the reference clock by a desired time interval so as to generate a desired timing signal.
For example, the timing generating apparatus includes a variable delay circuit unit for receiving the reference clock and delaying the reference clock by a desired time interval and a linearization memory for controlling the delay amount of the variable delay circuit unit. Generally, the variable delay circuit unit includes a plurality of delay elements. The linearization memory stores a delay setting value in response to linearization of a desired delay amount of the variable delay circuit unit. The variable delay circuit delays the reference clock by passing the reference clock through a route of a predetermined delay element based on the data stored in the linearization memory. The data stored in the linearization memory is predetermined by design information of the delay elements, where an error occurs between the delay amount of the variable delay circuit unit and the delay setting value which is a desired delay amount due to the variation in manufacture of the delay elements or the surrounding temperature in use.
Since the error is not necessarily constant to each of the delay setting values, jitter occurs in the timing signal generated by the timing generating apparatus. Accordingly, the timing generating apparatus is desirable to be capable of generating a timing signal from which the jitter is eliminated.
And in order to reduce the jitter, the timing generator may be provided with a frequency synthesizer. In this case, although the frequency synthesizer can generate a timing signal whose jitter is small for a certain period, there is a problem that it is difficult to change the period in real time. Due to these problems, it is difficult to test the electronic device with high precision in the test apparatus.